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? semiconductor components industries, llc, 2014 january, 2014 ? rev. 0 1 publication order number: ncv4276c/d ncv4276c 400 ma low-drop voltage regulator the ncv4276c is a 400 ma output current integrated low dropout regulator family designed for use in harsh automotive environments. it includes wide operating temperature and input voltage ranges. the device is offered with 3.3 v, 5.0 v, and adjustable voltage versions available in 2% output voltage accuracy. it has a high peak input voltage tolerance and reverse input voltage protection. it also provides overcurrent protection, overtemperature protection and inhibit for control of the state of the output voltage. the ncv4276c family is available in dpak and d 2 pak surface mount packages. the output is stable over a wide output capacitance and esr range. the ncv4276c has improved startup behavior during input voltage transients. the ncv4276c is pin for pin compatible with ncv4276b. features ? 3.3 v, 5.0 v, and adjustable voltage version (from 2.5 v to 20 v) 2% output voltage ? 400 ma output current ? 500 mv (max) dropout voltage (5.0 v output) ? inhibit input ? very low current consumption ? fault protection ? +45 v peak transient voltage ? ? 42 v reverse voltage ? short circuit ? thermal overload ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? these are pb ? free devices d 2 pak 5 ? pin ds suffix case 936a 1 5 dpak 5 ? pin dt suffix case 175aa 1 5 see detailed ordering and shipping information in the ordering information section on page 14 of this data sheet. ordering information http://onsemi.com 76cxxg alyww 1 1 nc v4276c ? xx awlywwg marking diagrams a = assembly location wl, l = wafer lot y = year ww = work week g = pb ? free device xx = 33 (3.3 v) = 50 (5.0 v) = aj (adj. voltage) *tab is connected to pin 3 on all packages.
ncv4276c http://onsemi.com 2 ? + i inh q gnd current limit and saturation sense bandgap reference thermal shutdown figure 1. ncv4276c block diagram error amplifier nc ? + i inh q gnd current limit and saturation sense bandgap reference thermal shutdown figure 2. ncv4276c adjustable block diagram error amplifier va pin function description pin no. symbol description 1 i input; battery supply input v oltage. 2 inh inhibit; set low ? to inhibit. 3 gnd ground; pin 3 internally connected to heatsink. 4 nc / va not connected for fixed voltage version / voltage adjust input for adjustable voltage version; use an external voltage divider to set the output voltage 5 q output: bypass with a capacitor to gnd. see figures 3 to 8 and regulator stability considerations section.
ncv4276c http://onsemi.com 3 maximum ratings rating symbol min max unit input voltage v i ? 42 45 v input peak t ransient v oltage v i ? 45 v inhibit inh voltage v inh ? 42 45 v voltage adjust input va v va ? 0.3 10 v output v oltage v q ? 1.0 40 v ground current i q ? 100 ma input voltage operating range (note 1) v i v q + 0.5 v or 4.5 v (note 2) 40 v esd susceptibility (human body model) (machine model) (charged device model) ? ? ? 4.0 250 1.25 ? ? ? kv v kv junction t emperature t j ? 40 150 c storage t emperature t stg ? 50 150 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be af fected. 1. functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresses beyond the recommended operating ranges limits may affect device reliability. 2. minimum v i = 4.5 v or (v q + 0.5 v), whichever is higher. lead temperature soldering reflow (note 3) lead temperature soldering reflow (smd styles only), leaded, 60 ? 150 s above 183, 30 s max at peak reflow (smd styles only), lead free, 60 ? 150 s above 217, 40 s max at peak wave solder (through hole styles only), 12 sec max t sld ? ? ? 240 265 310 c 3. per ipc / jedec j ? std ? 020c. thermal characteristics characteristic test conditions (typical v alue) unit dpak 5 ? pin p ackage min pad board (note 4) 1 pad board (note 5) junction ? to ? tab (psi ? jlx, jlx ) 3.8 4.3 c/w junction ? to ? ambient (r ja , ja ) 75.1 58.5 c/w d 2 pak 5 ? pin p ackage 0.4 sq. in. spreader board (note 6) 1.2 sq. in. spreader board (note 7) junction ? to ? tab (psi ? jlx, jlx ) 5.4 5.4 c/w junction ? to ? ambient (r ja , ja ) 54.2 43.3 c/w 4. 1 oz. copper, 0.26 inch 2 (168 mm 2 ) copper area, 0.062 thick fr4. 5. 1 oz. copper, 1.14 inch 2 (736 mm 2 ) copper area, 0.062 thick fr4. 6. 1 oz. copper, 0.373 inch 2 (241 mm 2 ) copper area, 0.062 thick fr4. 7. 1 oz. copper, 1.222 inch 2 (788 mm 2 ) copper area, 0.062 thick fr4.
ncv4276c http://onsemi.com 4 electrical characteristics (v i = 13.5 v; ? 40 c < t j < 150 c; unless otherwise noted.) characteristic symbol test conditions min typ max unit output output voltage, 5.0 v v ersion v q 5.0 ma < i q < 400 ma, 6.0 v < v i < 28 v 4.9 5.0 5.1 v output voltage, 5.0 v v ersion v q 5.0 ma < i q < 200 ma, 6.0 v < v i < 40 v 4.9 5.0 5.1 v output voltage, 3.3 v v ersion v q 5.0 ma < i q < 400 ma, 4.5 v < v i < 28 v 3.234 3.3 3.366 v output voltage, 3.3 v v ersion v q 5.0 ma < i q < 200 ma, 4.5 v < v i < 40 v 3.234 3.3 3.366 v output voltage, adjustable v ersion av q 5.0 ma < i q < 400 ma v q +1 < v i < 40 v v i > 4.5 v ? 2% ? +2% v output current limitation i q v q = 90% v qtyp (v qtyp = 2.5 v for adj version) 400 600 1100 ma quiescent current (sleep mode) i q = i i ? i q i q v inh = 0 v ? ? 10 a quiescent current, i q = i i ? i q i q i q = 1.0 ma ? 95 200 a quiescent current, i q = i i ? i q i q i q = 250 ma ? 5 15 ma quiescent current, i q = i i ? i q i q i q = 400 ma ? 10 35 ma dropout voltage, adjustable v ersion v dr i q = 250 ma, v dr = v i ? v q v i > 4.5 v ? 250 500 mv dropout voltage (5.0 v v ersion) v dr i q = 250 ma (note 8) ? 250 500 mv load regulation v q,lo i q = 5.0 ma to 400 ma ? 3.0 20 mv line regulation v q v i = 12 v to 32 v, i q = 5.0 ma ? 4.0 15 mv power supply ripple rejection psrr f r = 100 hz, v r = 0.5 v pp ? 70 ? db inhibit inhibit voltage, output high v inh v q v qmin ? 2.3 2.8 v inhibit voltage, output low (off) v inh v q 0.1 v 1.8 2.2 ? v input current i inh v inh = 5.0 v 5.0 10 20 a thermal shutdown thermal shutdown temperature (note 9) t sd i q = 5.0 ma 150 ? 210 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 8. measured when the output voltage v q has dropped 100 mv from the nominal valued obtained at v = 13.5 v. 9. guaranteed by design, not tested in production.
ncv4276c http://onsemi.com 5 5.5 ? 45 v input c i1 1.0 f c i2 100 nf i i i inh 1 2 5 4 3 gnd c q 22 f i q q nc output figure 3. applications circuit; fixed voltage version ncv4276c r l i inh input c i1 1.0 f c i2 100 nf i i i inh 1 2 5 4 3 gnd c q 22 f i q q va output figure 4. applications circuit; adjustable voltage version ncv4276c r l i inh r 1 r 2 v q = [(r1 + r2) * v ref ] / r2 c b * c b * ? required if usage of low esr output capacitor c q is demand, see regulator stability considerations section
ncv4276c http://onsemi.com 6 typical performance characteristics 0.01 0.1 1 10 0 150 250 350 50 100 200 300 400 esr ( ) stable region i q , output current (ma) unstable region figure 5. output stability with output capacitor esr, fixed versions (5.0 v and 3.3 v) 0.01 0.1 1 100 i q , output current (ma) esr ( ) stable region 0 150 250 350 50 c q = 10 f 100 200 300 400 figure 6. output stability with output capacitor esr, fixed versions (5.0 v and 3.3 v) esr ( ) figure 7. output stability with output capacitor esr, adjustable version unstable region 0.01 0.1 1 100 i q , output current (ma) stable region 0 150 250 350 50 100 200 300 400 unstable region unstable region c b capacitor not connected figure 8. output stability with output capacitor esr, adjustable version 10 c q = 22 f 10 0.01 0.1 1 10 1000 0 150 250 350 50 100 200 300 400 esr ( ) stable region i q , output current (ma) unstable region unstable region c b capacitor not connected c q = 22 f v q = 2.5 v 100 c q = 22 f v q = 6 v v q = 12 v
ncv4276c http://onsemi.com 7 typical performance characteristics ? fixed versions t j , junction temperature ( c) v i , input voltage (v) 160 120 80 40 0 ? 40 4.90 4.95 5.00 5.05 5.10 10 8 6 4 2 0 0 1 2 3 4 5 6 v q , output voltage (v) v i = 13.5 v r l = 1 k v q , output voltage (v) t j = 25 c r l = 20 v i , input voltage (v) 40 30 20 10 0 0 2 6 10 12 i q , quiescent current (ma) t j = 25 c r l = 20 figure 9. output voltage vs. junction temperature, 5.0 v version t j , junction temperature ( c) v i , input voltage (v) 160 120 80 40 0 ? 40 3.24 3.28 3.30 3.34 3.36 40 30 20 10 0 0 1 2 3 4 5 6 v q , output voltage (v) v i = 13.5 v r l = 660 i q , quiescent current (ma) t j = 25 c r l = 20 v i , input voltage (v) 10 4 3 2 1 0 0 2 3 v q , output voltage (v) t j = 25 c r l = 20 figure 10. output voltage vs. junction temperature, 3.3 v version figure 11. quiescent current vs. input voltage, 5.0 v version figure 12. quiescent current vs. input voltage, 3.3 v version 3.32 3.26 4 1 5 figure 13. output voltage vs. input voltage, 5.0 v version figure 14. output voltage vs. input voltage, 3.3 v version 535 25 15 4 8 35 25 15 5 9 7 5 3 1 6789
ncv4276c http://onsemi.com 8 typical performance characteristics ? fixed versions i q , output current (ma) 400 300 200 100 0 0 100 150 200 300 350 400 v dr , dropout voltage (mv) t j = 125 c t j = 25 c v i , input voltage (v) 50 20 0 ? 40 ? 50 ? 1.2 ? 0.8 ? 0.4 0 0.4 0.8 1.6 i i , input current (ma) r l = 6.8 k t j = 25 c 1.2 v i , input voltage (v) 45 40 30 20 10 0 0 200 400 600 700 i q , output current (ma) t j = 25 c v q = 0 v figure 15. input current vs. input voltage, 5.0 v version i q , output current (ma) 600 500 400 300 200 100 0 0 2 6 8 12 16 18 i q , output current (ma) 50 40 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 i q , quiescent current (ma) v i = 13.5 v t j = 25 c i q , quiescent current (ma) v i , input voltage (v) 50 20 0 ? 40 ? 50 ? 1.0 ? 0.8 ? 0.4 0.2 0.4 0.8 i i , input current (ma) r l = 6.8 k t j = 25 c ? 0.2 figure 16. input current vs. input voltage, 3.3 v version figure 17. dropout voltage vs. output current, only 5 v version figure 18. maximum output current vs. input voltage figure 19. quiescent current vs. output current (high load) figure 20. quiescent current vs. output current (low load) v i = 13.5 v t j = 25 c ? 30 ? 20 ? 10 10 40 30 ? 30 ? 20 ? 10 10 30 40 ? 0.6 0 0.6 250 50 350 250 150 50 100 300 500 35 25 15 5 4 10 14
ncv4276c http://onsemi.com 9 typical performance characteristics ? adjustable version 2.45 2.46 2.47 2.51 2.55 ? 40 0 40 80 120 160 t j , junction temperature ( c) v q , output voltage (v) 0 1 2 3 02 46 810 v i , input voltage (v) v q , output voltage (v) t j = 25 c r l = 20 figure 21. output voltage vs. junction temperature 2.48 2.49 2.50 2.52 2.53 2.54 0 0.5 1.0 1.5 2.0 3.0 5.0 010203040 v i , input voltage (v) t j = 25 c r l = 20 figure 22. quiescent current vs. input voltage 3.5 4.0 2.5 4.5 ? 1.0 ? 0.8 ? 0.2 0 0.6 ? 50 ? 40 0 10 v i , input voltage (v) i i , input current (ma) t j = 25 c r l = 6.8 k 50 ? 0.6 ? 0.4 0.2 0.4 figure 23. output voltage vs. input voltage figure 24. input current vs. input voltage i q , quiescent current (ma) v i = 13.5 v r l = 500 13579 ? 30 ? 20 ? 10 20 30 40 5152535
ncv4276c http://onsemi.com 10 typical performance characteristics ? adjustable version 0 0.1 0.2 0.5 010203040 i q , output current (ma) t j = 25 c 0 50 150 200 250 350 400 0 50 100 150 350 400 i q , output current (ma) v dr , dropout voltage (mv) t j = 25 c v i = 13.5 v figure 25. dropout voltage vs. output current, output voltage set to 5.0 v 0.3 0.4 50 200 250 300 t j = 125 c 0 100 200 300 400 500 01020304045 v i , input voltage (v) i q , output current (ma) t j = 25 c v q = 0 v figure 26. maximum output current vs. input voltage 600 700 0 2 6 8 12 14 18 0 100 200 300 400 i q , output current (ma) i q , quiescent current (ma) t j = 25 c v i = 13.5 v figure 27. quiescent current vs. output current (high load) 500 600 figure 28. quiescent current vs. output current (low load) i q , quiescent current (ma) 100 300 15 25 35 5 4 10 16
ncv4276c http://onsemi.com 11 circuit description the ncv4276c is an integrated low dropout regulator that provides a regulated voltage at 400 ma to the output. it is enabled with an input to the inhibit pin. the regulator voltage is provided by a pnp pass transistor controlled by an error amplifier with a bandgap reference, which gives it the lowest possible dropout voltage. the output current capability is 400 ma, and the base drive quiescent current is controlled to prevent oversaturation when the input voltage is low or when the output is overloaded. the regulator is protected by both current limit and thermal shutdown. thermal shutdown occurs above 150 c to protect the ic during overloads and extreme ambient temperatures. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v q ) and drives the base of a pnp series pass transistor via a buffer. the reference is a bandgap design to give it a temperature ? stable output. saturation control of the pnp is a function of the load current and input voltage. oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. see figure 4, test circuit, for circuit element nomenclature illustration. regulator stability considerations the input capacitors (c i1 and c i2 ) are necessary to stabilize the input impedance to avoid voltage line influences. using a resistor of approximately 1.0 in series with c i2 can stop potential oscillations caused by stray inductance and capacitance. the output capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures ( ? 25 c to ? 40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturer?s data sheet usually provides this information. the value for the output capacitor c q , shown in figure 3, should work for most applications; see also figures 5 to 8 for output stability at various load and output capacitor esr conditions. stable region of esr in figures 5 to 8 shows esr values at which the ldo output voltage does not have any permanent oscillations at any dynamic changes of output load current. marginal esr is the value at which the output voltage waving is fully damped during four periods after the load change and no oscillation is further observable. esr characteristics were measured with ceramic capacitors and additional series resistors to emulate esr. low duty cycle pulse load current technique has been used to maintain junction temperature close to ambient temperature. minimum esr for c q = 10 f and 22 f is native esr of ceramic capacitor with which the fixed output voltage devices are performing stable. murata ceramic capacitors were used, gcm32er71e106ka57 (10 f, 25v, x7r, 1210), grm32er71e226me15 (22 f, 25v, x7r, 1210). calculating bypass capacitor if usage of low esr ceramic capacitors is demand in case of adjustable regulator, connect the bypass capacitor c b between voltage adjust pin and q pin according to applications circuit at figure 4. parallel combination of bypass capacitor c b with the feedback resistor r 1 contributes in the device transfer function as an additional zero and affects the device loop stability, therefore its value must be optimized. attention to the output capacitor value and its esr must be paid. see also stability in high speed linear ldo regulators application note, and8037/d for more information. optimal value of bypass capacitor is given by following expression c b 1 2 f z r 1 (f) where r 1 = the upper feedback resistor f z = the frequency of the zero added into the device transfer function by r 1 and c b external components. set the r 1 resistor according to output voltage requirement. chose the f z with regard on the output capacitance c q , refer to the table below. c q ( f) 10 22 47 f z range (khz) 16 ? 18 11 ? 18 8 ? 18 ceramic capacitors and its part numbers listed bellow have been used as low esr output capacitors c q from the table above to define the frequency ranges of additional zero required for stability. gcm32er71e106ka57 (10 f, 25v, x7r, 1210) grm32er71e226me15 (22 f, 25v, x7r, 1210) grm32er61c476me15 (47 f, 16 v, x5r, 1210) inhibit input the inhibit pin is used to turn the regulator on or off. by holding the pin down to a voltage less than 1.8 v, the output of the regulator will be turned off. when the voltage on the inhibit pin is greater than 2.8 v, the output of the regulator will be enabled to power its output to the regulated output voltage. the inhibit pin may be connected directly to the input pin to give constant enable to the output regulator. setting the output voltage (adjustable version) the output voltage range of the adjustable version can be set between 2.5 v and 20 v. this is accomplished with an external resistor divider feeding back the voltage to the ic back to the error amplifier by the voltage adjust pin va.
ncv4276c http://onsemi.com 12 the internal reference voltage is set to a temperature stable reference of 2.5 v. the output voltage is calculated from the following formula. ignoring the bias current into the va pin: v q [(r1 r2) * v ref ] r2 use r2 < 50 k to avoid significant voltage output errors due to va bias current. connecting va directly to q without r1 and r2 creates an output voltage of 2.5 v. designers should consider the tolerance of r1 and r2 during the design phase. the input voltage range for operation (pin 1) of the adjustable version is between (v q + 0.5 v) and 40 v. internal bias requirements dictate a minimum input voltage of 4.5 v. the dropout voltage for output voltages less than 4.0 v is (4.5 v ? v q ). calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 29) is: p d(max) [v i(max) v q(min) ]i q(max) (1) v i(max) i q where v i(max) is the maximum input voltage, v q(min) is the minimum output voltage, i q(max) is the maximum output current for the application, i q is the quiescent current the regulator consumes at i q(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: r ja 150 o c t a p d (2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heatsink will be required. smart regulator ? iq control features i q i i figure 29. single output regulator with key performance parameters labeled v i v q } heatsinks a heatsink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja r jc r cs r sa (3) where r jc is the junction ? to ? case thermal resistance, r cs is the case ? to ? heatsink thermal resistance, r sa is the heatsink ? to ? ambient thermal resistance. r jc appears in the package section of the data sheet. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heatsink and the interface between them. these values appear in data sheets of heatsink manufacturers. thermal, mounting, and heatsinking considerations are discussed in the on semiconductor application note an1040/d.
ncv4276c http://onsemi.com 13 110 0 figure 30. r ja vs. copper spreader area, dpak 5 ? lead figure 31. r ja vs. copper spreader area, d 2 pak 5 ? lead 100 90 80 70 60 50 40 100 200 300 500 600 700 800 copper spreader area (mm 2 ) r ja , thermal resistance ( c/w) 80 0 75 65 60 55 50 45 40 30 100 200 300 500 600 800 copper spreader area (mm 2 ) 400 1 oz 2 oz r ja , thermal resistance ( c/w) 35 70 400 700 1 oz 2 oz 100 10 1 0.1 pulse time (sec) r(t) ( c/w) 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 figure 32. single ? pulse heating curves, dpak 5 ? lead 100 10 1 0.1 pulse time (sec) r(t) ( c/w) 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 figure 33. single ? pulse heating curves, d 2 pak 5 ? lead cu area 168 mm 2 cu area 736 mm 2 cu area 241 mm 2 cu area 788 mm 2
ncv4276c http://onsemi.com 14 100 10 1 0.1 pulse time (sec) r ja , 788 mm 2 ( c/w) 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 non ? normalized response 50% duty cycle 20% 10% 5% 2% 1% 100 10 1 0.1 pulse time (sec) r ja , 736 mm 2 ( c/w) 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 non ? normalized response 50% duty cycle figure 34. duty cycle for 1 spreader boards, dpak 5 ? lead 20% 10% 5% 2% 1% figure 35. duty cycle for 1 spreader boards, d 2 pak 5 ? lead single pulse single pulse ordering information device output v oltage accuracy output v oltage package shipping ? ncv4276cdt33rkg 2% 3.3 v dpak, 5 ? pin (pb ? free) 2500 / tape & reel ncv4276cds33r4g d 2 pak, 5 ? pin (pb ? free) 800 / tape & reel NCV4276CDT50RKG 5.0 v dpak, 5 ? pin (pb ? free) 2500 / tape & reel ncv4276cds50r4g d 2 pak, 5 ? pin (pb ? free) 800 / tape & reel ncv4276cdtadjrkg adjustable dpak, 5 ? pin (pb ? free) 2500 / tape & reel ncv4276cdsadjr4g d 2 pak, 5 ? pin (pb ? free) 800 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d.
ncv4276c http://onsemi.com 15 package dimensions d a k b r v s f l g 5 pl m 0.13 (0.005) t e c u j h ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.020 0.028 0.51 0.71 e 0.018 0.023 0.46 0.58 f 0.024 0.032 0.61 0.81 g 0.180 bsc 4.56 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.102 0.114 2.60 2.89 l 0.045 bsc 1.14 bsc r 0.170 0.190 4.32 4.83 s 0.025 0.040 0.63 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 0.170 3.93 4.32 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. r1 0.185 0.210 4.70 5.33 r1 1234 5 dpak 5, center lead crop dt suffix case 175aa issue a 6.4 0.252 0.8 0.031 10.6 0.417 5.8 0.228 scale 4:1
mm inches 0.34 0.013 5.36 0.217 2.2 0.086 soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d.
ncv4276c http://onsemi.com 16 package dimensions d 2 pak 5 case 936a ? 02 issue c 5 ref a 123 k b s h d g c e m l p n r v u terminal 6 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. tab contour optional within dimensions a and k. 4. dimensions u and v establish a minimum mounting surface for terminal 6. 5. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) maximum. dim a min max min max millimeters 0.386 0.403 9.804 10.236 inches b 0.356 0.368 9.042 9.347 c 0.170 0.180 4.318 4.572 d 0.026 0.036 0.660 0.914 e 0.045 0.055 1.143 1.397 g 0.067 bsc 1.702 bsc h 0.539 0.579 13.691 14.707 k 0.050 ref 1.270 ref l 0.000 0.010 0.000 0.254 m 0.088 0.102 2.235 2.591 n 0.018 0.026 0.457 0.660 p 0.058 0.078 1.473 1.981 r 5 ref s 0.116 ref 2.946 ref u 0.200 min 5.080 min v 0.250 min 6.350 min 45 m 0.010 (0.254) t ? t ? optional chamfer 8.38 0.33 1.016 0.04 16.02 0.63 10.66 0.42 3.05 0.12 1.702 0.067 scale 3:1
mm inches soldering footprint on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. sc illc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circui t, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data she ets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for e ach customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designe d, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any o ther application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such u nintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this l iterature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncv4276c/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc a sales representative

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